AMD Phenom II X4 965 - 125W TDP Processor

New 125W TDP For The 965:

Today AMD is releasing a revised Phenom II X4 965 Black Edition processor. The TDP has been lowered from 140W to 125W, and also happens to be the new C3 stepping. Along with this new processor launch the prices for the 965's have been lowered to an expected price of $195 USD, a savings of about $20.

New Phenom II X4 965 Processor:

• TDP = 125W (down from 140W)
• Hardware C1E implemented (faster switching of power states means virtually no impact to performance by power management when BIOS support is properly implemented)
• “Heavy” load support for DDR3-1333 (with proper BIOS implementation, memory controller will now support up to 4 x DDR3 DIMMs @ 1333MHz)

How do you tell the difference? The last letter of the OPN numbers are different:

• 125W = HDZ965FBK4DGM
• 140W = HDZ965FBK4DGI

This processor runs at a slightly lower voltage than the previous model. The 140W 965 has a default core voltage of 1.4v, whereas the new 125W 965 runs at 1.375v. In theory these chips should provide slightly better overclocking (on average).

The Phenom II X4 965 (140W) has been out for a while, so I'm going to go light on the benchmarks in this article. Also the Phenom II X4 965 is only 200 MHz (or 6%) faster than the Phenom II X4 955, which we have a full review here.

As with previous Athlon II / Phenom II releases, a BIOS update will probably be needed to ensure complete compatibility and functionality with existing AM2+ / AM3 motherboards. Most updates that support these chips have been out for a month or more. Worst case scenario if you are trying to run a newer chip on an older AM2+ board without an update is you will probably have to disable CnQ.

AMD Phenom II X4 965 Processor Technical Specifications:

• Model Number & Core Frequency: X4 965 / 3.4GHz (Black Edition)
• OPN: HDZ965FBK4DGM (“M” indicates new revision)
• L1 Cache Sizes: 64K of L1 instruction and 64K of L1 data cache per core (512KB total L1 per processor)
• L2 Cache Sizes: 512KB of L2 data cache per core (2MB total L2 per processor)
• L3 Cache Size: 6MB (shared between cores)
• Total Cache (L2+L3): 8MB
• Memory Controller Type:ype: Integrated 128-bit wide memory controller*
• Memory Controller Speed: Up to 2.0GHz with Dual Dynamic Power Management
• Types of Memory Supported:
  • PC2-8500 / DDR2-1066MHz
  • PC3-10600 / DDR3-1333MHz
• HyperTransport 3.0 Link: One 16-bit/16-bit link @ up to 4.0GHz full duplex (2.0GHz x2)
• Total Processor Bandwidth: Up to 37.3 GB/s total bandwidth
• Packaging: Socket AM3 938-pin organic micro pin grid array (micro-PGA)
• Fab location: GLOBALFOUNDARIES Fab 1 module 1 in Dresden, Germany (formerly AMD Fab 36)
• Process Technology: 45-nanometer DSL SOI (silicon-on-insulator) technology
• Approximate Transistor count: ~ 758 million (45nm)
• Approximate Die Size: 258 mm˛ (45nm)
• Max Temp: 62° Celsius
• Nominal Voltage: 0.875 - 1.4 Volts
• Max TDP: 125 Watts

*Note: Configurable for dual 64-bit channels for simultaneous read/writes